FPGA platform enables low-power edge apps

FPGA platform enables low-power edge apps
Lattice Semiconductor Corporation's new low power FPGA platform, called Lattice Nexus, is architected to deliver power-efficient performance benefitting developers of applications involving AI. (Lattice Semiconductor)

Taking dead aim at the growing number of AI at the Edge and sensor management applications, Lattice Semiconductor Corporation has announced a low power FPGA platform, called Lattice Nexus, whose architecture is designed to deliver power-efficient performance for developers of applications involving AI for IoT, video, hardware security, embedded vision, 5G infrastructure and industrial/automotive automation. The platform combines high system performance with reduced power consumption.

The reusable FPGA platform is designed to yield multiple products and speed time-to-market for new product designs, according to Peiju Chiang, wireless product manager, Lattice Semiconductor, in a recent conference call with FierceElectronics.

“Cloud-based platforms are becoming more popular, and more devices increasingly require low power with a small form factor,” Chiang said.

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“Embedded vision is one key application,” he added. “You have multiple sensors and displays, with higher resolutions and higher frame rates, connecting MIPI and legacy components. AI processing is being enabled at low power.”

To increase ease-of-use for customers, the Lattice Nexus platform provides system-level solutions that combine design software and pre-engineered soft IP blocks with evaluation boards, kits and reference designs to enable them to build their systems more quickly. These solutions target key growth application areas and include solutions like sensor bridging, sensor aggregation and image processing.

Lattice Nexus is developed on high-volume 28 nm fully-depleted silicon-on-insulator (FD-SOI) process technology from Samsung. This technology features 50% lower transistor leakage compared to bulk CMOS, according to the company.

Lattice’s initial product developed on the Nexus platform, called CrossLinkNX, consumes 75% less power compared to competing FPGAs of a similar class. In addition, CrossLink-NX has a Soft Error Rate (SER) up to 100 times lower than similar FPGAs in its class, making it a compelling solution for mission critical applications that must operate safely and reliably. The initial CrossLink-NX device is designed to support ruggedized environments found in outdoor, industrial, and automotive applications.

To better support applications where a long system boot time is unacceptable, CrossLink-NX delivers Instant on performance. This enables ultra-fast I/O configuration in 3 ms and total device configuration in less than 15 ms.

A high memory-to logic-ratio also helps throughput in AI Edge applications. CrossLink-NX features 170 bits of memory for every logic cell, the highest memory-to-logic ratio in its class, providing 2x the performance compared to prior generations.

The first CrossLink-NX device is available in a 6 x 6 mm form factor, which is up to ten times smaller than similar competing FPGAs in its class.

Lattice’s companion software design tool for FPGAs, Lattice Radian 2.0, offers new features that make it faster and easier than ever to develop Lattice FPGA-based designs.

Radian 2.0 has an on-chip debugging tool that allows users to conduct bug fixes in real time. The debugging feature lets developers insert virtual switches or LEDs in their code to confirm viability. The tool also lets users change hard IP block settings to test different operating modes.

The software also provides improved timing analysis that allows more accurate trace and route planning and clock timing to avoid design congestion and thermal issues. An engineering change order (ECO) editor lets developers make incremental changes to a completed design without having to recompile the entire FPGA database. A simultaneous Switching Output (SSO) calculator analyzes the signal integrity of individual pins to ensure their performance isn’t adversely affected by their proximity to another pin.

In addition to Radiant 2.0 design software, Lattice offers a robust library of popular IP cores including interfaces like MIPI D-PHY, PCIe, SGMII and OpenLDI and demos for common embedded visions applications such as 4:1 image sensor aggregation.

Originally scheduled for availability in 2020, Lattice is releasing CrossLink-NX ahead of schedule and is already sampling devices with select customers.

 

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