Ok, even the title sounds too good to be true, and you will likely remember the old adage “If it sounds too good to be true, then it probably is,” right? In fact, there is rarely an “ideal” power solution for any given design. There are so many tradeoffs to consider from typical SWaP (size, weight, and power) requirements to height, efficiency, thermals, regulation, reliability, and cost (e.g. – solution cost and total cost of ownership or TCO, not just bill-of-materials or BOM or component costs). These are even just the direct, technical parameters used to evaluate a solution, and this does not include the many, secondary things to consider, from multisourcing (i.e. – technical and cost implications along with continuity of supply) to warranty considerations. Given all this, how do we even begin to consider what is the ideal solution for a given design?
Perhaps a better way to think about this is in terms of energy utilization. After all, power is just an instantaneous value, where utilization is found by integrating under the power supply’s load curve (or Load Vs. Efficiency curve, as shown in Figure 1 (below). It is critical to note how often power supply rated efficiencies are mischaracterized. (If you read the last sentence and thought it to be in error because of the plural use of “efficiency,” please read on.) Quoting power supply efficiency as a single value is a purely marketing/sales exercise that rarely has anything to do with performance and determining system design needs. In the case of some wireless, Internet of Things (IoT) widget, this pertains directly to battery life. How often have you done some quick, napkin math to calculate battery life only to build the system and discover it ends up being 50-80 % of your calculated value? Rarely is a load completely static i.e., constantly operating at single point on the efficiency curve. An even rarer case is when that static load happens to be at the peak point on the load curve.
Now we go on to Figure 2 (below) in which the efficiency curves of two arbitrary power supplies are shown. Upon quick examination, would you assume SUPPLY A or SUPPLY B is the more efficient supply? Most people say SUPPLY B as it shows a peak efficiency >1 % beyond that of SUPPLY A.
In reality, the answer is IT DEPENDS and more importantly, it depends where the load is operating on the efficiency curve. Let us now look at the same curve, but with two different areas of utilization highlighted by the shaded blue area in Figure 3 (below). Both shaded areas cover 15 % load step ranges, but at different areas on the load curve. One can quickly see that for each area (or load range), there is a clear, winning power supply choice if that is the appropriate load range for your application. and it is different in each case. The critical, takeaway message here is when architecting your system, doing power budget calculations, and selecting solutions to determine critical battery life, evaluating the efficiency curve is what matters. Actual utilization should be a far more acute area of focus than seeking higher peak efficiency. As mentioned before, just going by the peak point on the curve is marketing smoke and mirrors for whitepapers, but has little to no actual value in system design.
We have barely scratched the surface for covering design guidelines and pragmatic tradeoffs in selecting power solutions for optimal embedded system design. There are a lot of common, rule-of-thumb type of design tradeoffs (i.e., increasing switching frequency tends to shrink filter components and thus the overall solution, footprint is typically sacrificed for profile, magnetics tend to drive overall solution size/weight, etc.). More about this and many related topics, was presented at a half-day, pre-conference workshop on “Digital & Analog Power Solutions for Embedded Systems” on Tuesday, June 25, 2019 at the Embedded Technology Conference in San Jose, CA (https://www.embeddedtechconf.com/). For more information, contact the author at: [email protected]
About the author
Brian Zahnstecher is a Sr. Member of the IEEE, Chair of the IEEE SFBAC Power Electronics Society (PELS) awarded 2017 Best Chapter awards at the local/national/worldwide levels concurrently (an unprecedented achievement), sits on the Power Sources Manufacturers Association (PSMA) Board of Directors, is Co-founder & Co-chair of the PSMA Reliability Committee, and is the Principal of PowerRox, where he focuses on power design, integration, system applications, OEM market penetration, market research/analysis, and private seminars for power electronics. He leads Power for the IEEE 5G Roadmap Applications & Services Working Group, authored the Group’s position paper, and has lectured on this topic at major industry conferences.
He has successfully handled assignments in system design/architecting, AC/DC front-end power, EMC/EMI design/debug, embedded solutions, processor power, and digital power solutions for a variety of clients. He previously held positions in power electronics with industry leaders Emerson Network Power (now Artesyn), Cisco, and Hewlett-Packard, where he advised on best practices, oversaw product development, managed international teams, created/enhanced optimal workflows and test procedures, and designed and optimized voltage regulators. He has been a regular contributor to the industry as an invited keynote speaker, author, workshop participant, session host, roundtable moderator, and volunteer. He has over 15 years of industry experience and holds Master of Engineering and Bachelor of Science degrees from Worcester Polytechnic Institute.