FPGAs have found a fit in a market where customers are desiring more flexibility and programmability than ever in their chips, whether their needs lie in supporting high-performance computing applications or low-power, small-footprint IoT devices. That has intensified the competitive dynamic among FPGA players, and has sparked moves like AMD’s acquisition of Xilinx, Intel’s recent decision to spin-off its programmable chip business, and the rise of low-power FPGA pioneer Lattice Semiconductor.
It is also inspiring FPGA companies to broaden their product lines in new directions, and that is what AMD did this week in unveiling its AMD Spartan UltraScale+ FPGA family, which the company said is targeted at cost-sensitive use cases requiring power-efficient performance for a wide range of I/O-intensive applications at the edge. It is an area often mined by the like of Lattice and Microchip, among others.
Rob Bauer, senior manager of product marketing at AMD, said the Spartan UltraScale+ devices consume 30% less power than previous generation Artix 7 28nm devices, while increasing interfaces counts and interface flexibility to increase connectivity options amid the explosion of sensors and other devices. They have what Bauer claimed is “the industry’s highest I/O to logic cell ratio” of FPGAs built on 28nm and below process technology, with up to 572 I/Os and voltage support up to 3.3V, enabling any-to-any connectivity for edge sensing and control applications. The 16nm fabric and support for a wide array of packaging, starting as small as 10x10mm, provide high I/O density in an ultra-compact footprint, Bauer said. The Spartan devices are also the first in the UltraScale+ family with a hardened LPDDR5 memory controller and PCIe Gen4x8 support, providing both power efficiency and future-ready capabilities for customers.
Filling in its FPGA product line at the cost-optimized, low-power end of the product spectrum will allow some clients to start their deployments with low-cost FPGAs and eventually scale to mid-range and high-end products, Bauer said.
Still, the Spartan devices are intended for longer-term deployments, such as in IoT environments where they could be left in place for many years.
“These are being designed for the next 15 plus years in the market,” Bauer said. “And so we put a lot of thought into what is the right feature set to support our customers, our target applications… and that is why flexible interfacing is so critical.”
This deployment reality also raises the requirement for the new FPGAs to have Spartan state-of-the-art security features. For example, even though quantum computers will not be in wide usage for another decade or more, the Spartan devices support Post-Quantum Cryptography with NIST-approved algorithms to guard against attacks generated by such machines. In addition, a physical unclonable function provides each device with a unique fingerprint for added security. They also have PPK/SPK key support that helps manage obsolete or compromised security keys while differential power analysis helps protect against side-channel attacks. The devices contain a permanent tamper penalty to further protect against misuse.
Bauer said sampling and evaluation kits for the Spartan family will be available in the first half of 2025.