Cambridge, England – XJTAG announces the release of Version 3.4 of its Development System, which introduces major improvements in the visibility into complex systems during all phases of electronic product development and manufacture.
As it becomes increasingly difficult to physically access the fine-pitch arrays of modern integrated devices, engineers must rely on alternative solutions to debugging and testing complex circuits. Through its ability to interrogate and control JTAG-enabled devices, Boundary Scan is becoming the perfect way to not only test but also develop and debug modern electronic products. As part of its in-circuit debugging and visualisation tool, XJAnalyser, XJTAG has developed Waveform Viewer, which offers engineers a live, correlated view showing the digital signal levels and transitions of acquired JTAG Chain data.
As well as displaying live data, Waveform Viewer also supports triggering, allowing circuit behaviour to be captured under specified conditions, such as when particular events occur. This can greatly improve an engineering team’s ability to capture key information and track down intermittent faults.
Through the flexibility of JTAG it is possible to observe and capture run-time functionality, even under BGA devices where pins are not accessible to a standard logic analyser. Waveform Viewer also supports the same pin driving and toggling functionality offered in Chain View within XJAnalyser, allowing engineers to drive signals from JTAG and observe the rest of the board, ensuring it responds as expected.
“The ability to visualise live waveforms that are correlated gives engineers much greater insight in to circuit behaviour. Waveform Viewer closes the loop, as now we can both stimulate and monitor signals graphically in a near real-time way that wasn’t possible before,” explained Bob Storey, Principal Software Engineer, XJTAG.
Improved Multi-Core Device Support
XJTAG v3.4 also improves support for JTAG devices that feature multiple JTAG cores, such as advanced Microprocessors, specialist SoCs and ASICs. Using multiple JTAG chains allows more complex tests to be executed and by improving its multi-core support, XJTAG v3.4 significantly improves the test development process, making setup simpler while enabling engineers to more easily construct multiple test scenarios using several JTAG Chains on a single board.
Log File Viewer
XJTAG’s production test environment, XJRunner has also been improved with greatly enhanced logging capabilities. The new enhanced format means log files can now contain the full details of errors, complete with links to the Layout and Schematic Viewers, which can be viewed long after the tests were carried out, without losing any of the original details available within the test output window. The new features are aimed at boosting the analytic capabilities of XJAnalyser and increasing both flexibility and usability in XJDeveloper and XJRunner.
Improved Power/Ground Net Suggestions
Other improvements in XJTAG v3.4 include enhancements within XJDeveloper that increase usability and speed project setup. These include improvements to the suggestions automatically made for Power and Ground nets, and to the formatting of project errors and warnings, which now include helpful links to direct the user’s attention to the right place in the project.
This update of the XJTAG Development System is now available to all customers with a valid maintenance contract. Evaluation versions and full-featured trials with free board set-up are also available to new customers.
To find out more, visit http://www.xjtag.com