Software-Driven SoC Analyzer Reduces Time-to-Results

Synopsys’ ZeBu Power Analyzer solution for software-driven system-on-chip (SoC) power analysis is said to deliver results 1,000 times faster than traditional simulation-based methods. The analyzer adds multi-threaded power analysis engines to the ZeBu Server 4 emulation platform. It allows SoC design teams to systematically analyze power usage of their designs when executing billion-cycle, complex software applications.

Reportedly, ZeBu Power Analyzer greatly reduces the risk of missing critical power issues by enabling use of realistic software workloads rather than synthetic scenarios. It integrates with the Synopsys PrimePower power signoff flow, enabling design teams to efficiently and accurately pinpoint and fix power issues.

Users can analyze power issues using RTL and gate-level flows in three steps:

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  1. Creates an activity model that runs in ZeBu during emulation to quickly identify power-critical windows during billion-cycle software workloads, such as an operating system boot or application software execution.
  2. Uses a novel, multi-threaded engine combining waveform expansion and efficient estimation technologies with better than 95percent accuracy to analyze power during critical time windows for early trade-off of different IP implementations.
  3. Selects narrow windows of high cycle power for hand-off to back-end designers to perform accurate average and peak power signoff using the industry-standard Synopsys PrimePower flow.

ZeBu Power Analyzer is available now. For more information, checkout the ZeBu Power Analyzer page.

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