MOUNTAIN VIEW, CA and SHANGHAI --- Semiconductor Manufacturing International Corporation and Synopsys, Inc. announce immediate availability of their joint 28-nanometer (nm) RTL-to-GDSII reference design flow. Developed through deep engineering collaboration between Synopsys and SMIC on the 28-nm High-K Metal Gate (HKMG) process technology, the flow is based on Synopsys' Galaxy™ Design Platform using key features from the IC Compiler™ II place and route solution, Design Compiler® Graphical synthesis, StarRC™ extraction solution, PrimeTime® signoff solution and IC Validator physical verification.
Already deployed on hundreds of designs, IC Compiler II addresses today's hypersensitive time-to-market needs by delivering superior quality of results and significant productivity gains with 10X faster design planning, 5X faster implementation and 2X more capacity. ''The reference flow features support for low-power techniques such as power-aware clock tree synthesis, power gating and physical optimization, enabled by industry standard IEEE-1801 UPF (Unified Power Format) power intent. Use of the reference flow allows designers to gain performance, power efficiency and chip density advantages while achieving predictable design closure.
The Lynx technology plug-in for the SMIC 28-nm HKMG process extends the reference flow to accelerate design setup and closure with Synopsys' Lynx Design System, a full-chip design environment providing innovative automation and visualization capabilities. This plug-in includes additional process technology information and representative flow and tool settings that help reduce the time it takes to get to optimized design results.
The SMIC-Synopsys 28-nm Reference Flow is available now from SMIC. For more information, visit http://www.smics.com/eng/design/reference_flows.php