TORONTO, ONTARIO and STORRS, CT /Marketwired/ -- POET Technologies Inc., developer of the proprietary planar-optoelectronic technology (POET) platform for monolithic fabrication of integrated electronic and optical devices on a single semiconductor wafer, announced that its board of directors has endorsed the next phases of the company's commercialization plan put forward by the Special Strategic Committee (SSC), chaired by Executive Director Peter Copetti.
The multi-pronged approach is based on discussions with potential industry partners and advisers regarding the company's two key markets, consisting of the military and commercial sector that have been identified as potential early adopters of the POET platform. Currently, while POET's incorporation in military projects is proceeding well and should provide value in several key verticals, significant value exists in adapting POET for mass production within a commercial semiconductor fab environment. The company must rapidly move to the next phase of its commercialization plan, which includes addressing feature size and scalability requirements for commercial fabs.
The Board has therefore endorsed and authorized the SSC to proceed on these recommendations, including:
- Establishing a POET Development Alliance (PDA). The company will be establishing relationships with one or more industrial partners, looking toward jointly adapting POET to commercial scale III-V implementation. Alliance partners will provide key input, including intellectual assets, technical staff, manufacturing capability, and foundry resources. In addition to optimizing device parameters and yields, a near-term goal will be to establish comprehensive design rules and a device parameter library for POET, which will proliferate licensed designs in a POET device ecosystem.
- Drive for Reduction of Feature Size to 100 nm Range (100 NM). The company will re-prioritize its technical roadmap by introducing specific milestones associated with reducing feature size from the sub-micron to the 100-nm range in scale, targeting 4Q2013 for that milestone. Consequently, the milestone for full optoelectronic integration on a single die will be re-scheduled to 2Q2014. Even without this full integration milestone, the 100 nm goal anticipates the cadence of commercial III-V foundry capabilities. This roadmap will focus the company's ODIS subsidiary on developmental work that will allow for scalable production within existing commercial fabs.
- Adoption of a Shareholder Rights Plan (SRP). The company will be structuring a special SRP to protect the potential value of the company, for all shareholders, during the period where discussions with potential partners may be taking place regarding PDA-related agreements, and as progress on the 100 NM project continues.
"This move crystallizes the company's strategy for unlocking the value of our intellectual property," said Mr. Copetti. "A development alliance with the right partners will definitely shorten time-to-market and help evolve a design ecosystem for POET in the marketplace."
Further SSC actions will be endorsed by the board, depending on the status of the above initiatives.
Mr. Copetti added, "While the new feature-size milestone is a challenge, given our commitment to projects in our delivery pipeline, I believe the POET team is more than capable of achieving this goal. There is no doubt that POET can demonstrate its n- and p-channel capability to be a viable and scalable complement to silicon CMOS."
The company's proprietary POET platform has demonstrated monolithic fabrication of integrated circuit gallium arsenide–based devices, containing both electronic and optical elements on a single wafer.
By offering components with the potential for increased speed, density, reliability, and lower costs, POET offers the semiconductor industry the ability to push Moore's Law to the next cadence level, overcoming current silicon-based bottlenecks and potentially changing the roadmap for a broad range of applications.
The POET platform is currently the basis for a number of key projects, including optical code division multiple access devices for avionics systems, combined RF/optical phased arrays, optoelectronic directional couplers, and ultra-low-power random access memory.
POET Technologies Inc. is the developer of the POET platform for monolithic fabrication of integrated circuit devices containing both electronic and optical elements on a single semiconductor wafer. With its head office in Toronto, Ontario, Canada, and operations in Storrs, CT, the company, through ODIS Inc., a U.S. company, designs III-V semiconductor devices for military, industrial, and commercial applications, including infrared sensor arrays and ultra-low-power random access memory. The company has 34 patents issued and 7 patents pending for the POET process, with potential high-speed and power-efficient applications in devices such as servers, tablet computers, and smartphones.