“Space: the final frontier… for computing.”
It’s not quite as catchy as the introduction to “Star Trek,” but maybe it will grow on you. In any case, it’s true. Spaceflight computing is expected to be a booming market in the years to come, and Microchip Technology recently unveiled the first devices in its planned family of PIC64 High-Performance Spaceflight Computing (PIC64-HPSC) microprocessors (MPUs).
Spaceflight computing is just one segment of what is expected to be a $1.8 trillion space economy by 2035, according to a report released by the World Economic Forum. That report stated that the space hardware and space service industry is set to grow at a CAGR of 7% from 2023’s $330 billion to $755 billion by 2035.
Microchip's announcement comes two years after NASA chose Microchip to develop a “High-Performance Spaceflight Computing processor that could provide at least 100 times the computational capacity of current spaceflight computers,” to help advance NASA’s future space mission, and the PIC64-HSPC is the first direct results of that effort, according to a Microchip statement. The new microprocessor also is more radiation-tolerant and fault-tolerant than existing space-grade processors, the company said.
It is unclear just how soon the PIC64-HSPC will be bound for the stars. Kevin So, director of product line marketing and management for Microchip’s communications business unit, told Fierce Electronics, “While we cannot disclose the confidential nature of our agreement with NASA/JPL[Jet Propulsion Laboratory], you can anticipate they are driving their internal directives to leverage this investment and computing platform for upcoming manned and unmanned missions.”
Following the introduction of the new MPU, Microchip’s next job will be to deliver flight-qualified devices to meet customer requirements, which So said the company is working to accomplish by 2026.
So also said “multiple” Microchip customers are part of an early access program, and that starting next year, they “will have first access to our devices, tools and software to support parallel development efforts so that they can be first to market with their products. These include primes and SBC partners like MOOG, IDEAS-TEK and Ibeos. PIC64-HPSC devices will become more generally available to the broader A&D [aerospace and defense] market in late 2025.”
Microchip said that unlike legacy space computing processors, its new devices employ increasingly popular RISC-V CPUs augmented with vector-processing instruction extensions to support AI and machine learning applications. They also include MPUs a suite of features and industry-standard interfaces and protocols not previously available for space applications.
Some of those capabilities include:
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Space-grade 64-bit MPU architecture: Includes eight SiFive RISC-V X280 64-bit CPU cores supporting virtualization and real-time operation, with vector extensions that can deliver up to 2 TOPS (int8) or 1 TFLOPS (bfloat16) of vector performance for implementing AI/ML processing for autonomous missions.
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High-speed network connectivity: Includes a 240 Gbps Time Sensitive Networking (TSN) Ethernet switch for 10 GbE connectivity. Also supports scalable and extensible PCIe Gen 3 and Compute Express Link (CXL) 2.0 with x4 or x8 configurations and includes RMAP-compatible SpaceWire ports with internal routers.
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Low-latency data transfers: Includes Remote Direct Memory Access (RDMA) over Converged Ethernet (RoCEv2) hardware accelerators to facilitate low-latency data transfers from remote sensors without burdening compute performance, which maximizes compute capabilities by bringing data close to the CPU.
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Platform-level defense-grade security: Implements defense-in-depth security with support for post-quantum cryptography and anti-tamper features.
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High fault-tolerance capabilities: Supports Dual-Core Lockstep (DCLS) operation, WorldGuard hardware architecture for end-to-end partitioning and isolation, and an on-board system controller for fault monitoring and mitigation.
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Flexible power tuning: Includes dynamic controls to balance the computational demands required by the multiple phases of space missions with tailored activation of functions and interfaces.
The company also said its Radiation-Hardened (RH) PIC64-HPSC RH is designed to give autonomous missions the local processing power to execute real-time tasks such as rover hazard avoidance on the Moon’s surface, while also enabling long-duration, deep-space missions like Mars expeditions requiring extremely low-power consumption while withstanding harsh space conditions. For the commercial space sector, the Radiation-Hardened PIC64-HPSC RT is designed to meet the needs of Low Earth Orbit (LEO) constellations where system providers must prioritize low cost over longevity, while also providing the high fault tolerance that is vital for round-the-clock service reliability and the cybersecurity of space assets.
“Microchip's PIC64-HPSC family replaces the purpose-built, obsolescence-prone solutions of the past with a high-performance and scalable space-grade compute processor platform supported by the company’s vibrant and growing development ecosystem,” said Kevin Kinsella, Architect - System Security Engineering with Northrop Grumman. “This innovative and forward-looking architecture integrates the best of the past 40-plus years of processing technology advances. By uniquely addressing the three critical areas of reliability, safety and security, we fully expect the PIC64-HPSC to see widespread adoption in air, land and sea applications.”