WILSONVILLE, OR -- Mentor Graphics Corp. announces that the Veloce emulation platform, specifically the Codelink offering, now supports the debug of designs built with AndesCore processors, such as N10 and N13. Andes Technology Corporation is a leading Asia-based supplier of small, low-power, high performance 32-bit embedded CPU cores. Over 600 million Systems-on-Chip (SoCs) containing its CPU cores have been shipped by Andes customers.
With Codelink support, developers using the AndesCore processors can complete designs months sooner by moving critical software tasks to the pre-silicon stage. The Codelink tool allows a software developer to enjoy a traditional software debug experience when running software on a design with the Veloce platform. Unlike traditional software debug methods on emulation, which tend to be too slow for most software developers, the Codelink offering delivers the performance demanded by advanced software teams. The Codelink solution captures the software verification results from the emulator then shifts the debug to a workstation so that many developers can debug at the same time. Moving the debug task offline marks an important methodology shift for software verification. Because the Codelink tool is non-intrusive, it enables detailed performance and power analysis not possible with other debug methods.
"Codelink support for the AndesCore processors lets our customers get to silicon production sooner," said Charlie Su, CTO & Senior VP, Andes Technology. "It also enables a greater degree of performance and power optimization at the system level not achievable with the traditional design cycle."
"Using Codelink and Veloce made a positive impact on software debug productivity," said the development representative at NTT Electronics. "Our software team can now accelerate the software debug process, and shorten this important step on the way to full system verification."
"Codelink is a critical technology that enables companies to 'shift left' their software development schedules, and deliver solutions to market in a much shorter time with less risk," said Eric Selosse, vice president and general manager of the Mentor Emulation Division.
About the Veloce Emulation platform
The Veloce emulation platform is a core technology in the Mentor® Enterprise Verification Platform™ (EVP) – a platform that boosts productivity in ASIC and SoC functional verification by combining advanced verification technologies in a comprehensive platform.
The Veloce emulation platform's success is a result of several factors, high design capacity, speed of execution, and exceptional functionality. Now considered among the most versatile and powerful of verification tools, project teams use emulation for hardware debugging, hardware/software co-verification or integration, system-level prototyping, low-power verification and power estimation and performance characterization.
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