IP Core Drives Autonomous Vehicles To Production

AImotive releases aiWare3, the company’s third-generation, scalable, low-power, hardware Neural Network (NN) acceleration core. According to the company, the patented IP core delivers scalability, flexibility, and new levels of performance in both central processing and sensor fusion units. The aiWare3 enables automotive OEMs and Tier One suppliers to achieve L3 autonomy in production in the shortest timescales.

 

The scalable aiWare3 architecture facilitates low-power continuous operation for autonomous vehicles (AVs) with up to 12 or more high-resolution cameras, LiDARs and/or radar. It delivers up to 50 TMAC/s (> 100 TOPS) per chip at more than 2 TMAC/s (4 TOPS) per W1. This makes it optimal for real-time, embedded inference engines with strict power, thermal and real-time constraints. It is ideal for the most processing-intensive NN tasks, such as low-latency, high frame rate segmentation, perception, and classification.

Free Monthly Newsletter

Compelling read? Subscribe to FierceEmbeddedTech!

The embedded tech sector runs the market’s trends. FierceEmbeddedTech subscribers rely on our suite of newsletters as their must-read source for the latest news, developments and analysis impacting their world. Sign up today to get news and updates delivered to your inbox and read on the go.

 

A highly configurable and scalable architecture enables OEMs to implement a variety of NN acceleration strategies in their hardware platforms. These can range from centralized NN resources shared among multiple workloads as part of a powerful central processing unit, to pre-processing integrated into each sensor or groups of sensors. The autonomous accelerator-based approach used by aiWare also enables customers to maximize re-use of their significant investment in existing hardware and software designs.

 

Unlike other solutions, aiWare3’s architecture has been optimized to deliver the highest efficiencies when integrated into realistic production ECU designs. The aiWare3 core can deliver more than 2 TMAC/s per W (7 nm estimated) while sustaining >95% efficiency under continuous operation

 

AImotive’s aiWare3 IP core can be implemented on-chip as part of a SoC (system on chip) for central processing, sensor processing, or sensor fusion gateway subsystems. It can also form the basis of one or more accelerator chips working alongside the SoC in a highly autonomous NN acceleration subsystem.

 

aiWare3’s IP core is supported by a software development kit (SDK) that uses The Khronos Group’s NNEF™ standard. To acquire even greater knowledge, read more about aiWare3 and/or peruse the latest benchmarks based on a range of workloads.

Suggested Articles

Renesas has introduced an evaluation and prototyping kit that will speed time-to-market to create secure end-to-end IoT cloud solutions for sensor-based…

According to market research firm ABI Research, global shipments of secure embedded hardware will double until 2023, surpassing 4 billion units.

Free Topology 6050 SoC allows two popular industrial protocols to communicate simultaneously