How To Build a DSSS Radio


The Do-It-Yourself DSSS Transceiver


A couple of months ago, when I told you I'd been thinking of building my own radio, you explained how fixed-frequency and spread-spectrum radios operate ( I've decided now that I'd like to build a direct sequence spread spectrum (DSSS) transceiver. Will you please give me some guidance on how to do it?

Signed, Bob the (Radio) Builder

Wise Guy: Sure, but my how-to explanation requires more space than we have this month, so hang in with me. For now we'll cover the transmitter portion of the transceiver; next month we'll look at the receiver and then discuss error correction code.

Meanwhile, be aware that among other things you'll need an electrical mixer, an RF oscillator, and a microprocessor.

The essence of a DSSS system is that the RF portion operates as a fixed-frequency radio. For the sake of convenience, we will use 802.11b (WiFi) operating values, though you can choose to operate your transceiver at different values.

Let's set the RF center frequency to 802.11b's channel 6 midpoint, that is, 2437 MHz; it's not necessary for the signal to span channel 6's entire 22 MHz range (Figure 1).

 Figure 1. 802.11 frequency (channel) assignments
Figure 1. 802.11 frequency (channel) assignments

But first, let me explain narrowband, fixed-frequency transmitters—which will help you to better grasp DSSS. In the case of our 2.4 GHz ISM band unit, the carrier signal (oscillator) is set to 2437 MHz; an electrical mixer mathematically combines the carrier signal with data.

To keep it simple, let's transmit a digital sequence of bits and use Amplitude Shift Keying as the modulation method. Logical 0 is represented by a low-amplitude pulse, while a high-amplitude pulse represents logical 1. Mathematically we're forming the function:

E(t) = A(t) cos (2π f t) where A(t) is the sequence of digital pulses (the data, that is) and f is the carrier signal of 2437 MHz.

Things can get a bit complicated here because the digital pulse can be represented as a Fourier series with associated fundamental and harmonic frequencies. The sharper (in the time domain) the pulse edge, the broader the companion frequency set; the amplitude of each successive harmonic frequency decreases (rolls off). (We're into Fourier decomposition of digital pulses now but don't need to go further; if you want more details check Wikipedia or a third-year EE textbook.)

We'll avoid the tricks involving configurations such as raised cosine and Gaussian pulses, and instead use a straight pulse and let the electrical circuit perform low-pass filtering (that is, round off its edges), keeping in mind that too much rounding will interfere with the receiver's ability to determine when one pulse ends and the next begins.

The net result of all this is double sideband (DSB) modulation of the 2437 MHz carrier signal.

DSSS is fundamentally different from FHSS, which leaves the data alone and varies the carrier frequency. Instead, DSSS leaves the carrier frequency fixed and mixes bits with the data. Different philosophies direct how to "correctly" interleave the spreading code bits with the data bits.

Therefore, start with your narrowband transmitter with its fixed carrier frequency of 2437 MHz. To interleave your data bits with spreading PN code, define the spreading code length, which is formed either by an N-length shift register or a microprocessor. A logic circuit based around an Exclusive OR (XOR) logic function is required (Figure 2).

Figure 2.  XOR logic
Figure 2. XOR logic

Please note that the receiver will have to "undo" the transmitter's interleaving process. We'll cover that next time.

Wise Guy is the problem-solving persona of WINA, the Wireless Industrial Networking Alliance ( . Send your questions to [email protected].

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