HiSilicon Adopts Cadence Innovus Implementation System for Production DSP Designs

SAN JOSE, CA -- Cadence Design Systems, Inc. announces that HiSilicon has completed a successful evaluation of the Cadence Innovus Implementation System that led to the adoption of the solution for 28nm and advanced node FinFET digital signal processor (DSP) design projects. The Innovus Implementation System enabled HiSilicon to achieve an optimal target performance of 1.2GHz while creating a 20 percent smaller design when compared with its previous solution.

The Innovus Implementation System handles challenging, highly complex designs utilizing technologies such as the GigaPlace™ solver-based placement technology, GigaOpt™ low-power optimization and CCOpt™ concurrent clock and datapath optimization engines. The Innovus Implementation System is built on a massively parallel architecture, allowing core algorithms to utilize multi-threading and distributed computing to provide a significant capacity improvement and speedup on industry-standard hardware. These capabilities enabled HiSilicon to implement multi-million cell blocks without having to rely on design partitioning or hierarchy.

"We chose to adopt the Innovus Implementation System because it was able to meet our target frequency using significantly less area based on our DSP block design," said Catherine Xia, Dept. Director of COT Design Dept. at HiSilicon. "The Cadence solution is intended for the complex, advanced-node designs that our customers demand, and we can now deliver these designs to the market much faster."

"The Innovus Implementation System was designed to address the capacity and PPA challenges of large complex designs, and we've seen HiSilicon improve both PPA and turnaround time simultaneously," said Dr. Anirudh Devgan, senior vice president and general manager of the Digital and Signoff Group at Cadence. "In particular, achieving significant area savings while meeting the maximum desired frequency shortened HiSilicon's implementation schedule and saved related development costs for their large designs."

The Innovus Implementation System is a next-generation physical implementation solution that enables developers to deliver high-quality designs with best-in-class PPA while accelerating time to market. For more information on the Innovus Implementation System, visit:
http://www.cadence.com/news/HiSilicon
http://www.cadence.com

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