MagnaChip Semiconductor activates its second-generation 0.13-µm BCD process technology integrated with high-density embedded Flash memory. The process includes advanced features compared to previous BCD processes, i.e., Flash memory up to 64 kB, low on resistance in power LDMOS up to 40V, low number of photo steps, and automotive grade reliability. These characteristics make the new generation of BCD process technology suitable for programmable PMICs, wireless power chargers, USB-C power-delivery IC products and automotive power ICs.
For trimming purposes, non-volatile memories in the BCD process are usually low density, below 256 bytes. But current devices require more complex functions and lower power consumption. As a result, there’s a need for high-density embedded non-volatile memory in the BCD process. This memory includes Flash memory used for power ICs, including programmable PMICs, wireless power chargers and USB-C power-delivery ICs. In some applications, high-density Flash memory up to 64 kilo bytes is used to store programming codes as well as trimming data. Until now, the drawback of implementing high-density embedded memory in other BCD processes has been that it increases the overall number of manufacturing steps.
MagnaChip could eliminate eight photo steps in the second-generation BCD process from the 1st generation by process optimization. Aside from embedded non-volatile memory, the second generation also improves power LDMOS specific on-resistance performance. For IoT and automotive applications, this BCD process provides 1.5V and 5V CMOS devices with very low leakage current level that enables low power consumption. Furthermore, this new BCD process has various option devices for Hall sensors, varactors, inductors, and RF CMOS devices that are useful for highly integrated IC solutions, which give smaller system size and less system cost. If you need more enlightenment, take a trot over to MagnaChip Semiconductor’s process info page.