ATPG Technology Targets Zero-Defect IC Test

Mentor introduces automotive-grade automatic test pattern generation (ATPG) technology for its Tessent TestKompress software. The technology includes a suite of fault models and test pattern generation applications that target defects in ICs at the transistor and interconnect levels, defects that would otherwise go undetected with traditional methodologies. Current ISO 26262 reliability requirements demand zero defective parts per million (DPPM).

 

Leveraging the proven layout-based design and library cell models used by the Tessent Diagnosis tool, together with critical area analysis (CAA) of the defect locations, users can automate the generation of manufacturing test patterns that effectively target defects at the transistor level inside cells, between adjacent cells, and in the interconnect based on critical area. 

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By combining automotive-grade ATPG with embedded deterministic test (EDT) compression and VersaPoint test points, TestKompress users can meet both cost and test-quality requirements. Tessent TestKompress Automotive-grade ATPG can be combined with Tessent Diagnosis cell-aware and layout-aware diagnosis for a complete end-to-end defect detection and diagnosis solution. All Tessent products are part of the Mentor Safe program and qualified for all ASIL ISO 26262 projects with a complete set of certified ISO 26262 documentation. Learn more about automotive-grade ATPG technology in the Tessent TestKompress product.

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