MIPI issues update for sensors-to-processor bus to aid IOT developers

Developers of Internet of Things and other devices recently got a first look at an updated specification for a utility and control bus to connect peripherals, including a wide variety of sensors, to an application processor.

Announced on Jan. 15, the MIPI I3C v.1.1 spec offers a speed increase and new features for better reliability in such buses, according to the MIPI Alliance. 

The alliance was first created in 2003 and now has grown to 300 companies across a broad range of mobile and application-related products. MIPI originally was an acronym for Mobile Industry Processor Interface but is now widely referred to by its acronym only.

MIPI officials believe the new spec will be used by designers in markets such as automotive, PCs, data centers, drones, industrial and IoT. It is also expected to be ideal for system-level designers who want a low-cost, off-the-shelf utility bus solution that relies on a small printed circuit board and an ecosystem of peripherals, sensors and apps, they said.

It relies on a lower number of pins than an earlier version and the smallest circuit board of available bus products, MIPI said in a statement. It integrates mechanical, motion, biometric, environmental and other sensors and includes new features for peripheral command, control and communication to a host processor over a short distance.

Ken Foust, chairman of the MIPI I3C Working Group, said the revision allows for a multilane bus for much faster interface speeds. “Instead of 10 to 20 Mbps, the bus can now run at 100 Mbps and break out of rather slow speed uses,” he said in an interview. There is also broadcast messaging ability for one point in an architecture to broadcast to multiple points.

For example, a drone might need multiple cameras, which could be controlled as a group in unison or with separate controls to each camera. “In a drone with multiple fisheye cameras for 360 degree viewing you can connect to the same two-wire bus and manage them independently or together using group addressing to cut down on traffic,” he said.

The revision updates a spec first introduced in 2017. It took six months in 2019 to develop the latest revision. Specification alliances usually start with differences, depending on the vendors involved. The work on the first version started in 2013 when developers were widely using 30-year-old digital interfaces for mobile devices such as smartphones. “We got all these representatives together and got to work disagreeing with each other,” he said with a laugh. “It wasn’t just one company saying it shall be this way. Everyone had a hand in developing IC3, and it took a while, but we felt better about what we had.”

MIPI is hosting a webinar on Feb. 12 at 8 a.m. PT to explore features and benefits of v 1.1 and provide an overall update. Registration is online.

Foust is a principle engineer at Intel Labs in addition to chairing the I3C Working Group. The Working Group also has other representatives from AMD, Broadcom, Cadence, IDT, Intel, InvenSense, Knowles, Lattice Semiconductor, MediaTek, Mentor Graphics, Nvidia, NXP, Qualcomm, QuickLogic, Sony, STMicroelectronics, Synopsys, VLSI Plus and more.

A full FAQ on the spec is posted online

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