Lattice intros next Nexus FPGA as market change looms

As one of its biggest FPGA competitors moves closer to being acquired, Lattice Semiconductor continues to keep its head down, working on pushing the boundaries of what FPGA devices targeted at applications with low power requirements can do.

The company two weeks ago announced the latest product in its Nexus general-purpose FPGA line, the Lattice CertusPro-NX, which extends the company’s general purpose FPGA portfolio that first launched in late 2019. The announcement came just days before AMD earned European Union regulatory approval for its acquisition of Xilinx, another major player in the FPGA market (As of this writing, reports were circulating that Chinese regulators were advancing in their consideration of the acquisition, the final regulatory piece needed for the deal to close.)

If that acquisition closes, Lattice will stand in the shadow of giants Intel and AMD in the FPGA market. Lattice historically has been more focused on low-power FPGAs than the other two, though the CertusPro-NX unveiling is its latest step in breaking from that narrow perception. As the fourth device from the Lattice Nexus platform to be launched in the past 18 months, the CertusPro-NX may be key to Lattice’s argument that it can deliver performance, high-bandwidth interfaces and the memory to support edge and on-device processing of AI analytics, all in an small 81 mm form factor.

In a recent briefing, Lattice made the case that the CertusPro-NX leverages innovations in FPGA fabric architecture and a low power FD-SOI manufacturing process to deliver four times less power consumption than similar FPGAs from competitors. In fact during the briefing, Lattice showed what it claimed was a live demonstration of that power consumption achievement, as it powered up its own device next to Intel Cyclone and Xilinx Kintex FPGA devices.

Beyond power consumption, Lattice said the CertusPro-NX also delivers on the bandwidth front, with support for up to eight programmable SERDES lanes capable of speeds up to 10.3 Gbps to enable communication and display interfaces like 10 Gigabit Ethernet, PCI Express, SLVS-EC, CoaXPress, and DisplayPort. 

While FPGA devices used in small footprint applications like robotics and automotive ADAS need to keep power consumption and overall form factor to a minimum, they also need to have bandwidth interfaces that can help information processed at the device level be sent out to broader networks, according to Steve Douglass, corporate vice president, R&D at Lattice.

In addition, Douglass said the new device does not skimp on processing power, providing rich on-chip memory that is 65% more than what similar FPGAs deliver, while also supporting  the LPDDR4 DRAM memory standard.

“We’re seeing a continuous rapid expansion of devices being added to the edge of the network,” Douglass said. “Many of these devices are being deployed in locations with limited access to energy sources and in rugged environments where it’s extremely challenging to control their operating conditions. Many of these devices are also in constrained spaces. Some of them are even concealed inside a larger system. These devices really need to have a low power profile because the options for thermal management are quite limited, and they need the smallest footprint possible to fit, but they also need high bandwidth so they can send info out to the network.”

He added, “They also need to be able to support processing or even co-processing of data on the device. With some applications there is no time to send info to the cloud, so data must be analyzed in real time with no latency.”

Linley Gwennap, principal analyst at The Linley Group, said in a statement distributed by Lattice that the company’s new device addressed requirements on all fronts--power consumption, form factor, bandwidth and memory, as well as reliability. “Lattice’s CertusPro-NX FPGAs address all of these factors; in particular, they far exceed the competition in mean time between failures (MTBF) and offer the lowest power in their class,” the statement read.

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