Tektronix unveils what it’s calling the industry’s first complete PHY layer and conformance test solution for JEDEC LPDDR4. With adoption starting in 2015, LPDDR4 builds on the current generation of LPDDR3 technology and will deliver improved data rates up to 4.26 Gb/s and use an ultra-low voltage core to reduce power consumption by approximately 35%. Tektronix now offers integrated PHY layer testing and debug of the new LPDDR4 standard in DDR-LP4 analysis software. Through automated set-up and test execution, users can reduce testing cycles from a week or more to a single hour. Should a memory system fail conformance tests, designers can quickly switch to debug mode and use tools like the Visual Trigger capability on Tektronix oscilloscopes to isolate events of interest for deeper root-cause analysis with the DPOJET Jitter and Eye measurement toolkit. In conjunction with partner Nexus Technology, Tektronix is also introducing the industry's first LPDDR4 memory component interposers featuring two patented interposer designs. Option DDR-LP4 with LPDDR4 support is available now. Price is $2,000.