SSI – A Masterclass

Sensors Insights by Mark Howard

This article describes the Synchronous Serial Interface (SSI) used by many position sensors and controllers. It is aimed at both electrical and mechanical design engineers who want to understand how SSI works and its merits relative to other interfaces, without getting too deeply in to the bits and bytes.

Background

Sensors for measuring linear or angular position may be considered to be in two groups: incremental and absolute. What happens on power up is a good test of which group a sensor belongs to. If the sensor has to do a calibration step to find its position, it's incremental, if it doesn't, it's absolute.

Most engineers still specify incremental position sensors because they think absolute versions might be too costly but, nowadays, absolute sensors don't cost that much. The proportion of absolute sensors is increasing because equipment and automation users are increasingly unwilling to wait for a protracted start-up routine.

In the 1980s and 1990s, many absolute position sensors gave a parallel output where the 1s and 0s of a binary value or Gray code were represented by a number of wires (often a ribbon cable) by a high or low voltage. This parallel approach has died off because of its relatively high cost, size, complexity, and reliability, especially in precision sensors. A 20-bit parallel output sensor would need at least 20 individual signal wires. Not so bad with a single sensor but a nightmare in a robot, for example, where there are lots of sensors, motors, and power lines.

Parallel interfaces have largely been replaced by the Synchronous Serial Interface (SSI) where the 1s and 0s are fed in series along the signal wires. SSI is a well-established and widely used interface for industrial communications between a controller and sensor – especially for absolute position sensors. Importantly, the use of SSI is not restricted to a particular manufacturer or club of manufacturers and no membership or license fees are needed.

SSI in General

SSI is based on RS-422 hardware standard. This standard specifies the electrical characteristics of the signaling circuits, but is limited to defining signal levels whereas other properties such as electrical connectors, pins and wiring, are open to the designer's choice. These circuit designs allow data to be reliably and quickly transmitted over long distances in noisy environments without expensive or bulky electronics, cables, or connectors. High data rates and long distances are achieved using balanced, or differential, signaling.

Fig. 1: A simplified SSI block diagram
Fig. 1: A simplified SSI block diagram

SSI is described as a point-to-point, synchronous, serial communication channel for transmitting digital data. Point-to-point basically means that it's not a complex, multi-node bus or network system. Synchronous means that the data transmission is synchronized using a clock signal. Serial means it's not parallel so multiple bits of data are sent down the same wire. The data is transmitted between a master, usually a controller that generates the clock signal, and a slave, usually an absolute position sensor that generates the data and value.

RS-422 uses a nominal 0 to 5V signal and a cable made of two sets of twisted pair wires (one pair for data and one pair for clock signals) and a ground wire. While a double pair cable may be practical for many RS-422 applications, the RS-422 specification only defines one signal path and does not assign any function to it. Typically, most SSI cable uses twisted pairs with a metal foil or mesh, as an electromagnetic shield, over each twisted pair and/or over the complete wire bundle underneath an overall cable sheath.

Generally, with SSI, data and clock transmissions over cable lengths of around 20m need little or no special consideration. Distances of 20m will cover most applications.

At cable lengths of greater than 20m it's a good idea to keep cable lengths as short as practical. High data rates of about 10 Mbits/s are readily achieved over cable lengths of 10m or 20m using 24AWG cable. However, as cable lengths increase, data rates should be reduced as per figure 2.

Fig. 2: RS-422 guideline on data rate and cable length
Fig. 2: RS-422 guideline on data rate and cable length

The above data is based on 24AWG wire and cable lengths can be increased if the cable is beefed up to say 22AWG or 20AWG. Maximum cable length is also influenced by the tolerable signal distortion, local electromagnetic noise levels, and differences in ground potential between the cable ends.

Relative to other interfaces, SSI's technical features are:

  • inexpensive due to lower component count, uses only four wires, slaves or sensors use master clock eliminating the need for precision oscillators, and a wide variety of connectors and cables available
  • secure data output with possibility for error detection and parity signalling
  • resilient to electromagnetic interference
  • cable lengths of up to 1000s of metres
  • easy electrical isolation between sensor and host
  • data transmission synchronised by a clock signal
  • high baud rates of up to l0Mbits/second
  • number of bits in a message is not limited to a defined message size
  • multiple slaves can be connected to a common clock

SSI and RS-422 can sometimes be confused with RS-485 which is a multi-point system. RS-422 cannot implement a true multi-point communications network since there can be only one driver on each pair of wires, however one driver can be connected to multiple slaves.

SSI Clock And Data Transmission

The master, or controller, controls the clock signals and the slave (the sensor) transmits the data/value. When invoked by the master, the data is clocked out from the slave's output, usually a shift register. The master and slave are synchronized by the clock. Data is transmitted using balanced or differential signals.

Basically this means the CLOCK and DATA lines are twisted pair cables. The clock sequence is triggered by the master when a data/value is required. Different clock frequencies can be used ranging from 100 kHz to 2 MHz and the number of clock pulses depends on how many data bits are to be transmitted. The protocol for the data transmission is based on three different subsequent parts (Leading-"1" → Data-Bits → Trailing-"0"). This helps ensure reliable and secure data transmission, free from any hardware or software errors.

The SSI is initially in the idle mode, where both the CLOCK and DATA lines stay high and the slave keeps updating its data. Keeping the CLOCK and DATA outputs high while idle is useful in detecting broken wire contacts.

As can be seen in figure 3, the first falling edge after Tmu starts the Read Cycle and the transfer of data. Each rising edge of the CLOCK transmits the next data bit of the message, starting with Dn-1. After the last rising edge of the clock sequence, the data line is set by the Error Flag (if supported) for the period Tmu – 0.5Xt. After Tmu, the latest position data is now available for transmission in the next Read Cycle.

Fig. 3: SSI LOCK &  DATA timing diagram
Fig. 3: SSI LOCK & DATA timing diagram

  • T: Clock Period (1/T = 100 kHz to 2 MHz)
  • Trc: Read Cycle time: This is defined as (n x T) + (0.5 x T)
  • Tmu: Message Update time. The time from last falling edge of clock to when new data is ready for transmission
  • Timg: Intermessage Gap time. Must be >Tmu otherwise position data will be indeterminate
  • n: The number of bits in the message (not including the Error Flag)

After n-CLOCK pulses (rising edges) the data value has been transmitted. With the next CLOCK pulse (rising edge n+1) the sensor output goes to low level. If it is high even after n+1 rising edges then it means that the interface has a short circuit.

Readings from multiple slaves (up to three) can be enabled at the same time by connecting them to a common clock. To avoid ground loops and to electrically isolate the slave, complete galvanic isolation by optocouplers is necessary.

Multiple transmissions of the same data happen only if there is continuous clocking even after the transmission of the least significant bit. The initial sequences are the same as that of the single transmission. In the idle state the CLOCK and DATA lines are high, but with the arrival of the first falling edge, the transmission mode is evoked and the data bits are transmitted sequentially starting with the most significant bit with every rising edge of the CLOCK. The transmission of the least significant bit means that the transmission of the data is complete. An additional rising edge pushes the data line to low, signifying the end of transmission of the data.

If there are continuous clock pulses even after the completion, i.e., the next clock pulses comes in time tw (< tm ), the value of the slave is not updated. This is because the mono-flop output is still unsteady and the value in the shift register still contains the same value as before. So with the next rising edge, i.e., after the (n+1) rising edge, the transmission of the same data continues and the MSB of data transmitted earlier is re-transmitted. Then, it follows the same procedure as earlier transmissions, leading to multiple transmissions of the same data.

The value of the slave is updated only when the timing between two clock pulses is more than the transfer timeout. Multiple transmission can be used to check the data integrity. The two consecutive received values are compared, transmission failures are indicated by differences between the two values. The transmission of data is controlled by the master and the transmission can be interrupted at any time just by stopping the clock sequence for a period longer than the time out period. The slave automatically will recognize the transfer timeout and go into idle mode.

Some manufacturers have added additional information to the basic SSI protocol in various efforts to ensure high integrity data transmission. For secure transmission and to indicate the end of data transmission, CRC bits or parity bits can be added. They are used for identifying if the data has been correctly interpreted and received.

Sensors Using SSI

The more observant readers may have noted that this article has used the term 'sensor' rather than the more usual 'encoder'. This is deliberate because encoders are often, but incorrectly, thought of as specifically optical devices, producing data in proportion to a measured position.

In recent years, a new generation of encoders, especially absolute encoders, are not optical but rather inductive, sometimes referred to as 'incoders'. Such devices use printed circuit board transformer constructions and are well suited to measuring absolutely, accurately, and reliably in harsh conditions. Unsurprisingly, they often use SSI as their preferred communications method. They have gained a significant market share in through-bore, bearing-less formats favored in high reliability, precision applications in the defense, medical, aerospace, and industrial sectors (see figure 4).

Fig. 4: A bearingless, inductive encoder, or 'incoder', that outputs absolute angle data using SSI
Fig. 4: A bearingless, inductive encoder, or 'incoder', that outputs absolute angle data using SSI

About the Author
Mark Howard is co-founder and Managing Director at Zettlex Ltd. Headquartered near Cambridge, in the UK. Mark previously worked for Siemens in Switzerland as Head of Technology Strategy and has a BS First Class Honours degree in Mechanical Engineering and a Masters degree in Systems Engineering.

Related Stories

Magnetostrictive Sensor Technology Plays Integral Role in Operation of World's Largest Radio Telescope

High Reliability Sensing Solution Based on Advanced Magnetostrictive Technology

Color, Contrast, and Luminescence Sensors: Which One Should You Choose?

Read more on

Suggested Articles

OmniVision's new OX01F10 SoC module provides automotive designers with a small form factor with low-light performance, ultra-low power and reduced cost.

Several industry leaders have formed a QSFP-DD800 Multi-Source Agreement (MSA) Group to expedite development of high-speed, double-density, quad small form…

NXP Semiconductors N.V. has announced its secure fine ranging chipset, SR100T, to achieve precise positioning performance for next-generation UWB-enabled…