Research and Markets Publishes 2008 Wafer-Level Packaging Report

DUBLIN, Ireland /BUSINESS WIRE/ -- Research and Markets announced the addition of "WLP & Embedded Die Technologies 2008" to their offering.

If we take a look at the amazing learning curve of the semiconductor industry in terms of chip density versus cost improvements over time, it is easy to realize that a gap is widening between the scaling evolutions of the chip front end and the packaging-assembly manufacturing industries.

Wafer-level packaging (WLP) is all about filling that gap. By making the packaging and assembly steps a whole collective wafer-level process, packaging now has the potential to scale with the cost and size evolutions of most stringent semiconductor applications. As a generic description, WLP should be defined as "all packaging and assembly process steps are done at the wafer level, the last step being the chip dicing." As a consequence of this, WLP does not require any intermediate substrate interposer: wafer-level packaged components are directly surface-mountable onto the circuit board. WLP is definitively a breakthrough packaging technology that will spread even to the most cost-sensitive applications because it will scale favorably with the trend to manufacture on ever-increasing wafer diameters.

Actually, it is difficult to estimate the real status of volume production for WLP. The new packaging report aims at giving clues for understanding the technologies, trends, and market status of WLP in semiconductor ICs, CMOS imagers, and MEMS applications.

The new report gives a precise description of the different types of devices using WLP and their related manufacturing challenges. Examples of major market findings are:

  • For CMOS imagers, WLP is indeed already an industrial reality. Today, about 35% of CMOS imagers in the latest consumer cell phone and notebook cameras are encapsulated in a WL-CSP. We forecast that the technology could penetrate about 63% of this market by 2012 because it will progressively spread from CIF/VGAs to higher-resolution image sensors.


  • Semiconductors ICs represent the largest potential for WLP. It used to be mostly restricted to small I/Os applications, such as integrated passive devices, LED drivers, and amplifiers. However, WLP technology now tends to integrate higher I/Os devices (>50) and to be manufactured on ever-larger wafer diameters (6, 8, and 12 in.). Thus, we forecast WLP technology to grow from 2.5% of the mainstream IC, with about 6 billion units, up to 4% by 2012. GaAs wireless RF chips are one of the most dynamic market segments, with an expected CAGR >100% over the 2007-2012 time period. Our analysis covers power, SAW, FBAR, logic, analogue, and memory devices as well.


  • For MEMS, the term "WLP" has been extensively used in the industry for many years now. However, it is more a wafer-level capping (WLC) approach that is currently developed and not a true WLP. Actually, production of the first real WLP for MEMS started in 2006 and will account for a significant portion of the WLP market by 2012. Companies such as Samsung, Dalsa Semiconductor, Hymite, Silex Microsystems, Infineon, IMT, TMT, and VTI have all reported advanced developments in this area. Different types of MEMS going to WLP have been analyzed: inertial (gyroscopes, accelerometers), RF (switchs and resonators), Si-microphones, biochips, and optical MEMS. The proportion of MEMS devices to be encapsulated in a real WLP is going to rapidly expand in volume, with a CAGR above 100% over the 2007-2012 time period.

Ultimately, WLP market value has been evaluated over 2007-2012 for MEMS, GaAs wireless, CMOS image sensors, power devices, SAW, FBAR, logic, memories and IPDs. Market forecasts have being established at the material, equipment, and device levels.

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