PowerSlash IP Now Available on UMC's 55nm Ultra-Low-Power IoT Platform

HSINCHU, Taiwan --- Faraday Technology Corporation and United Microelectronics Corporation announce the availability of Faraday's PowerSlash™ fundamental IP on UMC's 55nm ultra-low-power process (55ULP) technology. The combination of PowerSlash™ with UMC's process technology, both engineered for very low-power wireless applications, is optimized to serve wireless Internet of Things (IoT) applications that require extended battery life.

Fully leveraging UMC's 55ULP advantage, Faraday's PowerSlash IP works under extended power supply voltages that range from 0.81V to 1.32V. It includes multi-Vt libraries, fine-power granularity memory compilers and a comprehensive power management kit. In addition, the newly featured Turbo Mode effectively shifts the performance curve, helping MCU cores to achieve 2x performance or reduce dynamic power by 40% at nominal clock rates.

The PowerSlash IP, combined with Faraday's existing low-power design methodology, SoC ultra-low power control unit, and FIE3200 FPGA platform, can be utilized for low-power IC designs either during the front-end design phase or in back-end implementation. UMC's 55ULP technology can support both lower operating voltage and sub-pA device leakage, making the process ideal for button-cell battery applications. The synergy created by both Faraday and UMC's ultra-low power technologies sets new benchmarks for ultra-low power IC design platforms.

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